Lecturer
Phone: (408) 506-8597
Email: yleighto@calpoly.edu
Office: 20-118A
Spring 2024 Schedule
| Time |
Monday |
Tuesday |
Wednesday |
Thursday |
Friday |
|---|
| 8:10-8:30 AM |
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| 8:40-9:00 AM |
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| 9:10-9:30 AM |
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| 9:40-10:00 AM |
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| 10:10-10:30 AM |
EE 321-01
(20-128)
|
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EE 321-01
(20-128)
|
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EE 321-01
(20-128)
|
| 10:40-11:00 AM |
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| 11:10-11:30 AM |
EE 321-02
(20-128)
|
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EE 321-02
(20-128)
|
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EE 321-02
(20-128)
|
| 11:40 AM-12:00 PM |
|
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| 12:10-12:30 PM |
Office Hour |
|
Office Hour |
|
Office Hour |
| 12:40-1:00 PM |
(20-118A) |
|
(20-118A) |
|
(20-118A) |
| 1:10-1:30 PM |
EE 321-03
(20-128)
|
|
EE 321-03
(20-128)
|
|
EE 321-03
(20-128)
|
| 1:40-2:00 PM |
|
|
| 2:10-2:30 PM |
EE 321-04
(20-128)
|
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EE 321-04
(20-128)
|
|
EE 321-04
(20-128)
|
| 2:40-3:00 PM |
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| 3:10-3:30 PM |
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| 3:40-4:00 PM |
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| 4:10-4:30 PM |
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| 4:40-5:00 PM |
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| 5:10-5:30 PM |
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| 5:40-6:00 PM |
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| 6:10-6:30 PM |
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| 6:40-7:00 PM |
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| 7:10-7:30 PM |
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| 7:40-8:00 PM |
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| 8:10-8:30 PM |
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| 8:40-9:00 PM |
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| 9:10-9:30 PM |
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| 9:40-10:00 PM |
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Dr. Ying Cui Leighton completed her B.Sc from EE of Tsinghua University and her PhD from EE of University of British Columbia, Canada. Worked in Bay Area for Intel, Synopsys, and a couple startup companies, worked as Chip Designer, integrated Graphic Chipset architect, fab automation and hard and soft IP application engineer. Dr. Leighton has many US Patents and publications. Joined EE in 2021
