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Ying Cui Leighton



Lecturer

Website: https://yleighto.com
Office: 20-118A

Winter 2025 Schedule
 

Time Monday Tuesday Wednesday Thursday Friday
8:10-8:30 AM          
8:40-9:00 AM          
9:10-9:30 AM

EE 321-01

(10-115)

 

EE 321-01

(10-115)

 

EE 321-01

(10-115)

9:40-10:00 AM    
10:10-10:30 AM

EE 321-02

(10-115)

 

EE 321-02

(10-115)

 

EE 321-02

(10-115)

10:40-11:00 AM    
11:10-11:30 AM

EE 321-03

(10-115)

 

EE 321-03

(10-115)

 

EE 321-03

(10-115)

11:40 AM-12:00 PM    
12:10-12:30 PM

 

 

 

 

 

12:40-1:00 PM          
1:10-1:30 PM          
1:40-2:00 PM          
2:10-2:30 PM          
2:40-3:00 PM          
3:10-3:30 PM  

EE 361-10

(20-113)

EE 361-06

(20-113)

   
3:40-4:00 PM      
4:10-4:30 PM      
4:40-5:00 PM      
5:10-5:30 PM  

 

 
5:40-6:00 PM      
6:10-6:30 PM          
6:40-7:00 PM          
7:10-7:30 PM          
7:40-8:00 PM          
8:10-8:30 PM          
8:40-9:00 PM          
9:10-9:30 PM          
9:40-10:00 PM          

Biography

Dr. Ying Cui Leighton completed her B.Sc from EE of Tsinghua University and her PhD from EE of University of British Columbia, Canada. Worked in Bay Area for Intel, Synopsys, and a couple startup companies, worked as Chip Designer, integrated Graphic Chipset architect, fab automation and hard and soft IP application engineer. Dr. Leighton has many US Patents and publications. Joined EE in 2021

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